A tin perovskite transistor just survived four hours in open air, a feat that was impossible six months ago.
The device, built from cesium-tin-iodine (CsSnI3) and treated with a technique called volatile surface reconstruction, did not simply outlast its predecessors. It posted an on/off ratio exceeding 10^8 and a near-zero threshold voltage, then kept running for over a month at 100°C. The research, published in Nature on July 1, 2026, is the first paper on perovskite transistors to appear in the journal. Semiconductor Digest called it "a milestone that effectively inaugurates a new field of research."
Six months ago, a tin perovskite transistor exposed to air degraded in seconds. The unreacted tin ions sitting on the crystal surface would oxidize instantly, shredding electrical performance. That defect was considered intrinsic. The POSTECH team proved it was not.
The p-type bottleneck finally breaks
Perovskite semiconductors have split into two uneven stories. N-type perovskites, which carry current via electrons, advanced fast enough to threaten established materials in solar cells and LEDs. P-type perovskites, which carry current via holes, stalled. The reason was chemical: tin-based p-type films always contained leftover Sn2+ ions that acted as defect sites. Expose them to oxygen or moisture and the transistor died.
"Air is absolutely essential for human life, but for certain semiconductors, it is a deadly poison," the TechXplore article noted. For tin perovskites, it was a poison with no known antidote. Encapsulation could seal a finished device, but it did nothing about the defects already embedded in the material. You were sealing in the problem.
The team led by Professor Yong-Young Noh at POSTECH, collaborating with Professor Ji-Sang Park's group at Sungkyunkwan University and Professors Ao Liu and Huihui Zhu at the University of Electronic Science and Technology of China (UESTC), took a different approach. Instead of building a better cage, they removed the defect source entirely.
Acetate vapor and a self-assembling shield
The process is chemically precise. The researchers treated the CsSnI3 surface with potassium acetate (KAc). The acetate vapor transiently coordinates with undercoordinated Sn2+ sites, forming tin acetate, Sn(Ac)2. Tin acetate is volatile. When the device undergoes mild annealing, that tin acetate evaporates, stripping out the defect-forming ions.
The vacated positions are filled by potassium iodide (KI), which forms during the treatment and builds a thin, self-protective layer on top of the perovskite. This KI layer blocks oxygen and moisture. The result is a transistor whose surface chemistry is intrinsically stable, not one that relies on a barrier to keep a defective surface hidden.
This is the distinction that matters. Previous encapsulation strategies treated the symptom. Volatile surface reconstruction removes the cause. The treated transistors maintained stable operation for over a month at 100°C, a thermal stress test that would have destroyed untreated devices in minutes.
The collaboration spanned three institutions across two countries, combining POSTECH's device fabrication expertise with computational modeling from Sungkyunkwan University and materials characterization from UESTC. The Nature publication is not just a prestige marker. It signals that the broader condensed-matter physics community now views perovskite transistors as a serious platform, not a curiosity.
Korea's grand challenge meets the oxide semiconductor roadmap
Improving p-type transistor performance is one of Korea's "10 Future Grand Challenges in Semiconductors," designated by the Ministry of Science and ICT. The POSTECH result lands directly on that target.
But the impact extends far beyond one national research priority. For the past decade, display manufacturers have poured billions into oxide semiconductors, specifically IGZO (indium-gallium-zinc-oxide), for backplane transistors in AMOLED and emerging microLED displays. IGZO offers high mobility and low leakage. It is also n-type only.
The p-type gap has been the structural weakness of oxide semiconductor roadmaps. Without a high-performance p-type partner, complementary logic circuits—which are far more energy-efficient than the n-type-only circuits used today—remain impossible. Display backplanes, sensor arrays, and flexible logic have all been forced into workarounds: complex pixel compensation circuits, additional masking steps, higher power budgets.
Tin perovskite transistors with 10^8 on/off ratios and near-zero threshold voltages change the arithmetic. They match or exceed IGZO in the metrics that matter for switching. And they do it as p-type devices, opening the door to complementary perovskite logic for the first time.
The chain of consequences is direct and multi-layered. First, the immediate technical unlock: a viable p-type transistor enables true complementary logic in perovskite backplanes. This means a single material platform can now handle both n-type and p-type switching, slashing process complexity. No more hybrid integration of disparate material systems.
Second, the economic pressure: display manufacturers that bet heavily on oxide semiconductors now face a technology that makes their p-type gap a solvable problem rather than an accepted constraint. R&D budgets allocated to incremental IGZO improvements will come under immediate pressure. The question shifts from "can we live without p-type?" to "how fast can we integrate tin perovskites?" The billions already sunk into oxide fabs become a liability if a superior, more complete material platform emerges.
Third, the geopolitical accelerator: Korea's grand-challenge designation adds both funding and national urgency. Neither Samsung Display nor LG Display will want to cede the first-mover position to the other, and neither will want a Chinese competitor to commercialize the technology first. The UESTC collaboration on this paper is a reminder that the expertise is not confined to one country.
Within 12 to 24 months, expect Samsung Display or LG Display to announce a pilot line for tin perovskite backplane transistors. The first commercial p-type perovskite transistor will appear in a reference design for AMOLED or microLED displays by late 2027. The timeline is aggressive but not speculative. Four hours of air stability and one month at 100°C are sufficient for pilot-line qualification. The remaining hurdles are yield and uniformity, not fundamental science. If no pilot line is announced by mid-2028, the thesis here is wrong. That is the falsification point.
Reallocate now, or qualify from behind
For foundry and display R&D teams, the signal is unambiguous. Tin perovskite prototyping should absorb at least 15 to 20 percent of oxide semiconductor budgets starting this quarter. The qualification cycle for a new transistor material in a display backplane runs 18 to 36 months. Starting now means having data when the first pilot-line announcement triggers the industry scramble. Starting later means qualifying from behind.
The four-hour air survival number is the headline, but the one-month thermal stability at 100°C is the operational statistic that matters. It proves the material can survive backend processing temperatures. That is the gate through which every lab curiosity must pass to become a manufactured product. Tin perovskites just walked through it.
Watch for the first pilot-line announcement. It will be the signal that the window for low-cost experimentation has closed and the race for IP positions has begun. The first-mover advantage in perovskite transistor integration will accrue to the teams that treat this Nature paper not as an interesting result but as the starting gun.
Four hours that sentenced an era
The four hours in open air are not the destination. They are the proof that the defect-chemistry barrier was never intrinsic. It was an engineering problem disguised as a law of nature, and it has now been solved.
The transistor that survived four hours in air just sentenced the oxide semiconductor era to a four-year sunset. The only question is which manufacturer will announce its successor first.
